梁承托1,2,梁利平1,王志君1.一种结合施密特频率选择器的DLL型90°移相器[J].湖南大学学报:自然科学版,2019,(8):110~116
一种结合施密特频率选择器的DLL型90°移相器
A DLL-based 90° Phase-shifter with Schmitt Frequency Selector Scheme
  
DOI:
中文关键词:  延时锁相环  频率选择器  数控延时线  90°相移
英文关键词:Delay Locked Loop(DLL)  frequency selector  digitally controlled delay line  90°phase shift
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作者单位
梁承托1,2,梁利平1,王志君1 (1.中国科学院 微电子研究所北京 1000292.中国科学院大学北京 100029) 
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中文摘要:
      为了应对传统延时锁相环(Delay locked loop,DLL)的谐波锁定问题,提出一种结合施密特频率选择器的DLL型90°移相器. 采用施密特频率选择器和双数控延时线结构,有效提高该移相器的锁定频率范围. 另外,提出的施密特频率选择器能有效抑制输入时钟频率噪声,使移相器稳定工作. 在SMIC 55 nm CMOS工艺下流片,工作电压1.2 V,版图有效面积为0.131 mm2.测试结果表明,提出的移相器在250 MHz到800 MHz频率范围内稳定工作;800 MHz时,功耗为5.98 mW,且90°相移时钟的抖动峰峰值和均方根值分别是25.9 ps和2.8 ps.
英文摘要:
      In order to deal with the problem of harmonic look in the traditional Delay Locked Loop (DLL), a DLL-based 90°phase-shifter with a Schmitt Frequency Selector(SFS) was proposed. The SFS and dual delay lines were employed to achieve wider locking frequency range. In addition, the proposed SFS exhibits high capability of frequency noise suppression, which improves the stability of the proposed phase-shifter. The proposed phase-shifter, fabricated in SMIC 55 nm CMOS technology, occupies an active area of 0.131 mm2 and utilizes a 1.2 V supply voltage. The test results show that the proposed phase-shifter has an operating frequency ranging from 250 to 800 MHz and consumes 5.98 mW at 800 MHz. Furthermore, the measured peak-to-peak and root-mean-square (rms) jitters of 90°phase-shifted clock are 25.9 and 2.8 ps, respectively.
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