谢海情1,2,王振宇1,2,曾健平3,陆俊霖1,2,曹武1,2,陈振华1,2,崔凯月1,2.一种低温漂高电源电压抑制比带隙基准电压源设计[J].湖南大学学报:自然科学版,2021,(8):119~124
一种低温漂高电源电压抑制比带隙基准电压源设计
Design of Bandgap Voltage Reference with Low Temperature Drift and High PSRR
  
DOI:
中文关键词:  带隙基准  温度系数  电源电压抑制比  温度补偿
英文关键词:band gap  temperature coefficient  PSRR(power supply rejection ratio)  temperature compensation
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作者单位
谢海情1,2,王振宇1,2,曾健平3,陆俊霖1,2,曹武1,2,陈振华1,2,崔凯月1,2 (1. 长沙理工大学 物理与电子科学学院湖南 长沙 410114 2. 长沙理工大学 柔性电子材料基因工程湖南省重点实验室湖南 长沙 410114 3. 湖南大学 物理与微电子科学学院湖南 长沙 410082) 
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中文摘要:
      通过将具有高阶温度项的MOS管亚阈值区漏电流转换为电压,并与一阶温度补偿电压进行加权叠加,实现二阶温度补偿. 采用高增益的运放和负反馈回路提高电源抑制能力,设计一种低温漂高电源电压抑制比带隙基准电压源. 基于0.18 μm CMOS工艺,完成电路设计与仿真、版图设计与后仿真. 结果表明,在1.8 V的电源电压下,电路输出电压为1.22 V;在温度变化为-40~110 ℃时,温度系数为3.3 ppm/℃;低频电源电压抑制比为-96 dB@100 Hz;静态电流仅为33 μA.
英文摘要:
      The second-order temperature compensation was realized by weighted superposition of the first-order temperature compensation voltage and the voltage with high-order temperature term which was conversed from the subthreshold leakage current of MOS transistor. In addition,a high-gain operational amplifier and negative feedback loop were adopted to improve the power supply rejection ratio(PSRR). Subsequently,a bandgap voltage reference with low temperature drift and high power supply voltage rejection ratio was proposed. Based on 0.18 μm CMOS technology,circuit design and simulation,layout design,and post-simulation were carried out. The results indicated that the output voltage was 1.22 V under the power supply voltage of 1.8 V;the temperature coefficient(TC) was 3.3 ppm/℃ in the temperature range from -40 ℃ to 110 ℃;the PSRR at low frequency was -96 dB@100 Hz;the static current was only 33 μA.
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