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低电压低功耗音频Σ-Δ ADC调制器设计
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Design of Low Voltage Low Power Audio Σ-Δ ADC Modulator
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    摘要:

    针对应用于音频设备中的Σ-Δ ADC,提出一款改进的Σ-Δ ADC调制器. 该调制器结构改进传统调制器的结构并对调制器系数进行优化,克服传统Σ-Δ ADC调制器结构的缺点,同时对调制器中的两个关键电路即OTA放大器和比较器也进行优化,极大改善了OTA放大器和比较器性能. 改进后的调制器具有低电压、低功耗、高精度和较好的鲁棒性的特点. 该调制器采用1.2 V低电压供电,过采样比(OSR)为128,采样频率为6.144 MHz,信号带宽为20 kHz. 基于SMIC0.11 μm的工艺下,完成了Σ-Δ ADC调制器的版图设计,并最终流片成功. 芯片流片后的成测结果表明,调制器的信噪比达到102.4 dB,有效位达到16.7 bit,调制器的整体功耗仅1.17 mW左右,整个调制器的版图的面积仅为0.122 mm2左右. 调制器的成测性能指标表明,该调制器是音频芯片中Σ-Δ ADC电路的良好选择.

    Abstract:

    A Σ-Δ ADC modulator with low voltage and low power consumption is proposed for the application of Σ-Δ ADC in audio equipment. The modulator structure improves the traditional modulator structure and optimizes the modulator coefficients,thus overcoming the shortcomings of the traditional Σ-Δ ADC modulator structure. At the same time,OTA amplifier and comparator,two key circuits in the modulator,are optimized,which greatly improves the performance of OTA amplifier and comparator. The improved modulator has the characteristics of low voltage,low power consumption,high precision and good robustness. The modulator is powered by a 1.2 V low voltage,and it has an over-sampling ratio (OSR) of 128,a sampling frequency of 6.144 MHz,and a signal bandwidth of 20 kHz. Based on SMIC0.11 μm process,the layout design of Σ-Δ ADC modulator was completed,and the streaming chip was finally successful. The measurement results after chip streaming show that the signal-to-noise ratio of the modulator reaches 102.4 dB,the effective bit reaches 16.7 bit,the overall power consumption of the modulator is only about 1.17 mW,and the whole layout area of the modulator is only about 0.122 mm2. The measured performance of the modulator shows that it is a good choice for Σ-Δ ADC circuit in audio chip.

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张涛,何鹏,刘劲.低电压低功耗音频Σ-Δ ADC调制器设计[J].湖南大学学报:自然科学版,2021,48(8):125~132

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  • 在线发布日期: 2021-09-06
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