In order to deal with the redundant and failed coverage problem in the traditional random stimuli for cache coherence verification, a high level structural stimuli generation algorithm and corresponding functional coverage model are presented. Firstly conflict memory accesses are categorized into basic/complex synchronizations and thus abstracted into general bipartite graph model. Consequently a general layered equivalence partition algorithm of ISS and corresponding high level HSPC functional coverage model is proposed. Finally two structural stimuli generation algorithms based on the search of ISS tree is presented. Experiments is performed in the functional verification of the cache system of IME-Diamond SoC, the result indicates the HSPC coverage model can help uncover functional bugs more easily compared to code coverage and structural stimuli generation can reduce 96.3% stimuli for coverage convergence compared to random stimuli generation