Now，almost every processor architecture has added support for SIMD （single instruction multiple data） instructions. SIMD instructions can perform the same operation on a set of data simultaneously， enhancing the processing performance of the processor through data parallelism. However， most dynamic binary translators ignore the use of native SIMD instructions and instead simulate floating-point computations in software languages. This paper proposes a framework called FP-QEMU， based on QEMU translation system. FP-QEMU adopts SIMD instructions to optimize and replace floating-point calculation instructions， and completes a complete floating-point implementation on X86 and ARM benchmark platforms. The framework can identify the optimization opportunities of floating-point computation acceleration in dynamic binary translation system and use SIMD instructions to achieve the effect of improving the translation performance of dynamic binary translation system. Using SPEC 2006 as the benchmark， experiments show that compared with QEMU， FP-QEMU cross-platform ARM applications running on X86 computers can achieve a maximum speedup of 51.5% and an average speedup of 37.42%.