Based on the features and performance requirements of BSU (Branch & Shifting arithmetic logic Unit) in YHFT-DX, a new structure partition and a strategy of implementation were proposed, and the critical path and the corresponding design method were determined. The arithmetic operation module and shift operation module with tension timing were designed and optimized by hand semi-custom design method. Timing verification and analysis show that the timing is optimized for 6.86%, the area is decreased by 10.64%, and the frequency (1.0 GHz) is achieved.