ZHANG Hai yan1,LIU Yan2,CHEN Xiao ming2,ZHAO Yi hong2
(1. College of Electrical and Information Engineering, Hunan Univ, Changsha, Hunan 410082, China；2. College of Computer Science and Electronic Engineering, Hunan Univ, Changsha, Hunan 410082, China) 在知网中查找 在百度中查找 在本站中查找
This paper presented an improved scheduling algorithm for dynamic heterogeneous chip multicore processors(Heterogeneous Scheduling Genetic Algorithm,HSGA ).The proposed scheduling algorithm uses time slices of OS scheduler to complete the iterative procedure of HSGA, which can obtain efficient task scheduling results and choose the best process core for each application task. The experiments using SESC simulator show that the ED2s of the proposed algorithm are only 0.4%, 1.1% and 1.3% higher than those of a baseline classic Hungarian Algorithm with 4 cores, 8 cores and 16 cores chip multiprocessor respectively with random degradation. And the proposed algorithm can generate more stable and adaptive results for unpredictable heterogeneity, compared with Hungarian Algorithm and Local Search Algorithm.
