Aiming at the problems of high hardware resource consumption and low output accuracy in CORDIC algorithms， this design proposes an improved Coordinate Rotation Digital Computer（CORDIC） algorithm based on interval merging iteration. Based on the two-stage CORDIC algorithm， the algorithm uses interval merging iteration to complete the merging iteration operation in the second stage. For the truncation error caused by shift operation in merge iteration， interval merge iteration reduces the data error and resource consumption generated during the merge iteration process by reducing the size and number of data shifts. The simulation results show that the improved CORDIC algorithm not only retains the good characteristics of the two-stage algorithm in low latency but also reduces register consumption by 36.8% compared with the basic algorithm， 14.8% and 9.5% compared with the three-segment and two-stage algorithms， respectively. When a 16 bit output bit-width is given， the average error of the improved algorithm is reduced by 37.0% compared with the basic algorithm， 19.4% and 24.5% respectively compared with the three segment and two segment algorithms. Therefore， it is more suitable for modern digital communication with high speed， high accuracy， and low consumption.