In the realm of semiconductor technology control， achieving complete autonomous chip control has emerged as a focal point in today's semiconductor technology advancement. Given its features of open source and widespread adoption， the study of RISC-V architecture holds significant importance for enabling microprocessor autonomous controllability. Within microprocessor systems， limitations on physical resources and potential risks associated with direct storage access necessitate restrictions on DMA access to I/O devices， thereby impacting access performance. The prevailing approach involves virtualizing I/O transactions to effectively address this issue. This article firstly proposes a I/O virtualization architecture based on RISC-V， which greatly accelerates the I/O access process， this architectrue consums a few clock period to complete DMA requests from I/O devices to memory. This design will be integrated into RISC-V architecture CPU as an IP， accelerating the access of I/O devices to memory.