A cache capacity sharing mechanism based on fine-grained pseudo-partitioning (CSFP) was proposed, which was aimed at the capacity miss problem confronted with the private caches in Chip Multiprocessors (CMP). Each cache bank was equipped with a weighted saturation counter array, designed to collect and predict the memory demand diversity experienced by different threads at a fine granularity. The private region and shared region on each cache set were adjusted adaptively, and the partition decision was used to not only guide the replacement of the victim block, but also control the co-operation of spilling and receiving dynamically. An intelligent capacity sharing mechanism was adopted to correct the memory imbalance between different cores, which mitigated the capacity misses in CMP private cache effectively. Experimental results based on a cycle-accurate architecture simulator show that the CSFP mechanism can reduce the capacity misses of private caches in CMP significantly, so the average memory access latency of different programs can be reduced to some extent.