Today, the many-core processor based on NoC(Network-on-Chip) is becoming the focus of high performance processor design. While migrating to many-core era, traditional debug architecture is no longer suitable for modern high performance processors. Especially, there are several challenges in the field of debug system for many-core processors, such as trace recording and transferring, debug events broadcasting, timestamp synchronization, and so on. To overcome these challenges, this paper presented an independent debug framework for many-core processors. In the proposed framework, high frequency and high throughput debug channels can be achieved at low connection cost. Moreover, debug components in the framework are distributed and symmetric, and it can be used for further processors with much more cores. On trace transferring, we provided a bandwidth balanced architecture for non-intrusive trace exporting. To reduce the complexity of hardware design, it cooperates with software to configure the weight of trace channel for arbitration. On debug events spreading, we established an event broadcasting network which owns the same topology with NoC and is easy for physical implementation. Meanwhile this network possesses low propagation delay. On timestamp synchronization, we provided a new precise timestamp synchronization method using debug network and independent wires with low hardware cost.