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Power Estimation of Charge Pump PLL at System Level
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    Abstract:

    Power is an important factor that restricts the design of Integrated Circuit (IC). The power origin in CMOS IC,the aim of power estimation in IC design,the estimation method,and the power model were analyzed. The characteristic of analog integrated circuit and the corresponding way for power estimation were studied. In order to distribute the power at system level, the construction of charge pump PLL,the principle of every module and the contribution to power were also studied. The power estimation model of charge pump PLL with ring oscillator was proposed at system level. The relative error is less than 22% when compared with the actual measurement. This model is easy to be integrated into design tools and can give guidance on power consumption for PLL at system level to improve the quality of Integrated Circuit design.

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  • Received:
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  • Online: March 01,2019
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