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Design of ESD Protection Device for High Speed and Very Small Snapback DDSCR
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    Abstract:

    In order to solve the problems such as large trigger voltage, large voltage snapback margin and slow turn-on speed of Electrostatic Discharge(ESD) protection devices based on the Silicon Controlled Rectifier(SCR) structure, a dual-directional SCR(DDSCR) device embedded with PMOS and triggered by the RC circuit(DUT3) was designed. Three types of devices including the conventional DDSCR(DUT1),DDSCR embedded with PMOS (DUT2) and DUT3 were fabricated in a 0.35 μm Bipolar-CMOS-DMOS process. Their ESD characteristics were measured by the transmission line pulse system. The test results show that, compared with DUT1, the DUT2 trigger voltage decreases from 31.3 V to 5.46 V, the holding voltage increases from 3.59 V to 4.65 V,and the voltage snapback margin of DUT3 is very small, but the high leakage current up to 10-2 A makes it unsuitable for ESD protection. By introducing an RC circuit to provide a fixed gate voltage for the embedded PMOS in the DUT2, the modified DUT3 shows not only a further reduced voltage snapback margin but also a shorter response time of only 12.6 ns. Compared with DUT1, the turn-on speed of DUT3 increases by about 71.5%, and the leakage current can be stabilized at the order of 10-10 A. This optimized DUT3 is suitable for ESD protection in the low-voltage integrated circuits with requirements of high-speed, small snapback margin and narrow ESD design windows.

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History
  • Received:
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  • Adopted:
  • Online: September 02,2019
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