Existing research shows that although many cryptographic systems have passed the conventional security performance tests, they have been proved to be able to crack the sensitive information of the cryptographic system by side channel attacks. A chaotic cryptographic system is designed to resist side-channel attacks. Two chaotic maps are used to generate the round key and the random sequence number, respectively, and the intermediate data is generated by the plaintext, the round key, and the random sequence number through the XOR operation so as to enlarge the key space. In addition, the random sequence number also controls the randomization operation. The relationship between intermediate data and power consumption is hidden via the randomization operation. In this way, the leakage of side channel information is reduced, thus to resist the power analysis attack. In order to evaluate the security of the designed cryptographic system, first of all, it is routinely tested through character frequency test, information entropy test and dependency test. The experimental results show that the system has good security performance. In addition, the encryption algorithm is implemented on the Atmel XMEGA128 chip. Experimental results show that the proposed cryptosystem can defend against correlation power analysis.